1. Field of the Invention
The present invention relates to a method for manufacturing a circuit device in a manner such that a semiconductor substrate and a wiring substrate, which have different coefficients of thermal expansions, are bonded together.
2. Description of the Related Art
A packaging technology called CSP (Chip Size Package) is conventionally available for circuit devices or circuit chips. A circuit device according to the CSP is formed such that a semiconductor wafer (semiconductor substrate), where LSIs (circuit elements) and external connection electrodes connected to the circuit elements are formed on one main surface, is diced into individual pieces (semiconductor devices). Thus, the circuit device can be fixed onto a wiring substrate in a size practically the same as an LSI chip. This helps realize the miniaturization of the wiring substrate (motherboard) on which the circuit device is mounted.
In recent years, with miniaturization and higher performance in electronic devices, demand has been ever greater for further miniaturization of circuit devices used in the electronic devices. With such miniaturization and downsizing of circuit devices, it is of absolute necessity that the pitch of electrodes to enable mounting on a motherboard be made narrower. A known method of surface-mounting a circuit device is flip-chip mounting in which solder balls are formed on the external connection electrodes of the circuit device and the solder balls are soldered to an electrode pad of the motherboard. With this flip-chip mounting method, however, there are restrictive factors for the narrowing of the pitch of external connection electrodes, such as the size of the solder ball itself and the bridge formation at soldering. Recently, to overcome these limitations, the external connection electrodes are rearranged by forming the rewiring in the circuit device. As one method used for such rearrangement, known is a method, for example, where a bump structure formed by half-etching a metallic sheet is used as an electrode or a via, and the external connection electrodes of the circuit device are connected to the bump structure by mounting the circuit device on the metallic sheet with an insulating layer, such as epoxy resin, held between the circuit device and the metallic sheet (see Reference (1) in the following Related Art List, for instance).
Related Art List    (1) Japanese Unexamined Patent Application Publication (Kokai) No. Hei09-289264.
As the rewiring is formed by the press-forming at a stage where a plurality of circuit devices are arranged on the semiconductor substrate, the wafer may be warped in a cooling process after the press-forming because of a difference in the coefficients of thermal expansion between the semiconductor substrate and a metal (e.g., copper) constituting the rewiring. The warping of the wafer may cause a crack and the like in the wafer, thereby causing a displacement within the plane in the depth of focus in a lithography process. This results in a problem that the exposure cannot be executed or controlled properly.